Samsung chairman highlights chip packaging, visits Japanese unit三星董事长强调芯片封装技术,并参观日本分公司
Samsung Electronics Executive Chairman Lee Jae-yong visited the company’s semiconductor advanced packaging technology laboratory in Japan, Sunday,...

Samsung Electronics Executive Chairman Lee Jae-yong visited the company’s Advanced Package Lab in Yokohama, Japan, Sunday, and pledged to expand its research workforce and develop it into a global R&D hub. He discussed advanced packaging materials and processes with researchers and emphasized their importance for AI processor chips. Samsung has been investing 40 billion yen over five years, starting in 2024, to build research infrastructure in Japan and strengthen its advanced packaging competitiveness. The lab plans to expand research into wafer bonding, glass substrates and high-performance packaging architectures.
Samsung established the Advanced Package Lab in 2023, and it held its official opening ceremony in September this year.
The five-year investment of 40 billion yen was reported as equivalent to $254 million.
The lab develops and validates core technologies for materials and processes used in advanced semiconductor packaging, linking Samsung’s design and manufacturing capabilities with Japanese suppliers.
Advanced packaging integrates multiple chips, such as graphics processing units and high-bandwidth memory, into one package to boost performance, save space and lower costs.
The lab’s research areas differ from those of Samsung Electronics’ Semiconductor R&D Center in Korea, and the two organizations plan to work together to create R&D synergy.
Published Nov 1, 2026 4:01 pm KST
Samsung Electronics Executive Chairman Lee Jae-yong, center, examines materials during his visit to Advanced Package Lab in Yokohama, Japan, Sunday. Courtesy of Samsung Electronics
Samsung Electronics Executive Chairman Lee Jae-yong visited the company’s semiconductor advanced packaging technology laboratory in Japan, Sunday, pledging to continue expanding its research workforce there and develop the lab into a global R&D hub for next-generation packaging technologies.
According to Samsung Electronics, Lee visited Advanced Package Lab (APL) in Yokohama and discussed with researchers the latest developments in technologies for advanced packaging materials and processes, as well as ways to strengthen cooperation with Japan's materials, parts and equipment industries.
Lee stressed the importance of securing advanced packaging technologies, as they are emerging as critical for artificial intelligence (AI) processor chips.
APL was established in 2023 and held its official opening ceremony in September this year. Starting in 2024, Samsung Electronics has been investing 40 billion yen ($254 million) over five years to establish its research infrastructure in Japan and strengthen its competitiveness in advanced packaging technologies.
APL specializes in developing and validating core technologies for materials and processes used in advanced semiconductor packaging, serving as a bridge between Samsung Electronics' semiconductor design and manufacturing capabilities and Japan's advanced ecosystem of materials, parts and equipment suppliers.
The laboratory focuses on different research areas from the packaging research unit at Samsung Electronics' Semiconductor R&D Center in Korea, with the two organizations planning to work closely to create synergy in R&D.
Samsung Electronics Executive Chairman Lee Jae-yong, center, listens to an explanation during his visit to Samsung Electronics' Advanced Package Lab (APL) in Yokohama, Japan, Sunday. From left are Samsung Electronics Device Solutions R&D Japan Head Hiroichi Kawahira, Lee and APL head Takashi Kariya. Courtesy of Samsung Electronics
Advanced packaging refers to techniques and technologies that integrate multiple chips, such as graphics processing units and high-bandwidth memory, into a single package to boost performance, save space and lower costs.
Samsung Electronics said APL plans to expand its scope of research to cover next-generation processes and materials, including wafer bonding and glass substrates, as well as developing new high-performance packaging architectures for mass-producing energy-efficient, high-performance semiconductors.
The company said it selected Japan as the location for APL because the country is home to many globally competitive semiconductor materials, parts and equipment companies and has a well-established ecosystem connecting industry, academia and research institutions.
"The Japanese government has also designated the semiconductor and AI industries as strategic sectors and is actively pursuing investment and support policies, making Japan an attractive R&D hub for Samsung Electronics to advance semiconductor technologies and expand local partnerships," the company said.
Samsung Electronics plans to leverage Yokohama's talent pool and industry-academia-research infrastructure while developing APL into a research collaboration hub connecting Japanese materials and equipment suppliers with Samsung's semiconductor technology capabilities.
三星电子执行会长李在镕周日访问了位于日本横滨的公司先进封装实验室,并承诺将扩大研发团队,将其打造成为全球研发中心。他与研究人员探讨了先进封装材料和工艺,并强调了它们对人工智能处理器芯片的重要性。三星计划从2024年开始,在未来五年内投资400亿日元,用于在日本建设研发基础设施,以增强其在先进封装领域的竞争力。该实验室计划拓展晶圆键合、玻璃基板和高性能封装架构等领域的研究。
三星于 2023 年成立了先进封装实验室,并于今年 9 月举行了正式开幕仪式。
据报道,这项为期五年、总额达 400 亿日元的投资相当于 2.54 亿美元。
该实验室开发并验证先进半导体封装中使用的材料和工艺的核心技术,将三星的设计和制造能力与日本供应商联系起来。
先进的封装技术将多个芯片(例如图形处理单元和高带宽内存)集成到一个封装中,从而提高性能、节省空间并降低成本。
该实验室的研究领域与韩国三星电子半导体研发中心的研究领域不同,这两个机构计划合作,以创造研发协同效应。
发布于2026年11月1日下午4:01(韩国标准时间)
周日,三星电子执行会长李在镕(中)参观位于日本横滨的先进封装实验室时,正在查看材料。图片由三星电子提供。
周日,三星电子执行董事长李在镕视察了该公司位于日本的半导体先进封装技术实验室,承诺将继续扩大该实验室的研发人员规模,并将其发展成为下一代封装技术的全球研发中心。
据三星电子称,李健熙访问了位于横滨的先进封装实验室(APL),并与研究人员讨论了先进封装材料和工艺的最新技术发展,以及如何加强与日本材料、零部件和设备行业的合作。
李强调了确保先进封装技术的重要性,因为这些技术对于人工智能(AI)处理器芯片来说至关重要。
APL成立于2023年,并于今年9月举行了正式开幕仪式。从2024年开始,三星电子将在五年内投资400亿日元(约合2.54亿美元),用于在日本建立研发基础设施,并增强其在先进封装技术领域的竞争力。
APL 专注于开发和验证先进半导体封装材料和工艺的核心技术,充当三星电子半导体设计和制造能力与日本先进的材料、零部件和设备供应商生态系统之间的桥梁。
该实验室的研究方向与韩国三星电子半导体研发中心的封装研究部门不同,这两个机构计划密切合作,在研发方面创造协同效应。
周日,三星电子执行会长李在镕(中)参观了位于日本横滨的三星电子先进封装实验室(APL),并聆听了相关讲解。左起依次为:三星电子器件解决方案研发日本区负责人川平弘一、李在镕和APL负责人刈谷隆史。图片由三星电子提供。
先进封装是指将多个芯片(例如图形处理单元和高带宽内存)集成到单个封装中以提高性能、节省空间和降低成本的技术。
三星电子表示,APL计划扩大其研究范围,涵盖下一代工艺和材料,包括晶圆键合和玻璃基板,以及开发用于大规模生产节能、高性能半导体的新型高性能封装架构。
该公司表示,之所以选择日本作为APL的所在地,是因为日本拥有许多具有全球竞争力的半导体材料、零部件和设备公司,并且拥有完善的生态系统,将产业界、学术界和研究机构联系起来。
该公司表示:“日本政府已将半导体和人工智能产业指定为战略性产业,并积极推行投资和扶持政策,使日本成为三星电子推进半导体技术发展和扩大本地合作关系的理想研发中心。”
三星电子计划利用横滨的人才储备和产学研合作基础设施,将APL发展成为一个研究合作中心,将日本材料和设备供应商与三星的半导体技术能力联系起来。